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Vecchio 25-11-2014, 00.51.18   #97
AMIGA
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Registrato: 06-07-2006
Loc.: Brindisi
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Rif: BiNGo: OS 4.1 su WinUAE PPC

WinUAE 29.2 Beta 25

- Added 1M/0.5M+0.5M chip/slow ram option checkbox to Advanced Chipset (for example in rev6 A500 it is JP2 solder pad). If hardware is configured for 1M chip without 512k slow ram, normal chip ram alias at upper 512k of chip ram address space gets replaced with "bus noise". Can be only changed when chip RAM size is less than 1M. (ECS Agnus + 512k chipram without slow ram configuration always used this option previously, now it is optional and not enabled by default)
- Map Chip RAM mirror at 0x01000000 in A2620/A2630 config, to prevent A26x0 built-in monitor program detecting huge ram expansion at 0x01000000.
- uaenet.device + slirp combination was broken (probably has always been).
- uaegfx modeid space increased, reduces modeid conflicts if host os has huge amount of modes.
- Debugger does not anymore exit stopped CPU state (STOP instruction) after exiting debugger.
- "SCSI (Auto)" priorities changed: mainboard built-in first, then accelerator board, expansions last. (Expansions was first previously)
- More accurate 68000 prefetch mode instruction cycle usage, added non-static cycle counting (mul, div etc..)
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English Amiga Board Amiganews.it AfA One AROS x86 AROS 68k
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